Lateral PNP transistors which are used in applications where high voltages exist between their emitters and collectors may experience junction breakdown under certain conditions. If a low impedance path exists from the collector to ground, large currents will flow which may cause damage to the transistor as well as related circuitry. To avoid this problem, circuit designers usually provide a resistor in series with the collector of the PNP transistor and the circuitry to which it attaches. This resistor is normally placed in a separate isolated active region adjacent, or in proximity to, the active region containing the PNP transistor. This of course requires a separate active region having appropriate bias and interconnecting metalization which occupies chip space in addition to that required for the PNP transistor. What is needed is a means for lmiting current flow through a PNP transistor which does not require additional chip space or interconnecting metalization.